The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 25, 2008
Filed:
Oct. 18, 2005
Tilman Gloekler, Gaertringen, DE;
Christian Habermann, Stuttgart, DE;
Naoki Kiryu, Austin, TX (US);
Joachim Kneisel, Berlin, DE;
Johannes Koesters, Schoenbuch, DE;
Tilman Gloekler, Gaertringen, DE;
Christian Habermann, Stuttgart, DE;
Naoki Kiryu, Austin, TX (US);
Joachim Kneisel, Berlin, DE;
Johannes Koesters, Schoenbuch, DE;
International Business Machines Corporation, Armonk, NY (US);
Abstract
The present invention provides a method, an apparatus, and a computer program product for applying external clock and data patterns for TTP-LBIST. A simulation model for the logic under test is set up in a simulator. Next, a user sets up an external LBIST block, which comprises pre-verified internal clock and data pattern logic, and connects this block to the logic in the simulation model. The internal clock and data pattern logic provides the input patterns used in OPCG modes of LBIST. This internal clock and data pattern logic is already verified through the design effort. Therefore, the internal pattern generators become the external pattern generators in the simulation model. The external LBIST block applies the external clock and data patterns, and subsequently, the user receives and processes these output patterns to determine if the logic operates correctly.