The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 25, 2008

Filed:

May. 21, 2004
Applicant:

Charles F. Shelor, Arlington, TX (US);

Inventor:

Charles F. Shelor, Arlington, TX (US);

Assignee:

Via Technologies, Inc., Hsin-Tien, Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention is generally directed to a method and apparatus for emulating a portion of a stack. Certain embodiments of the invention manage data transfers between processor registers that are configured to emulate a top portion of a stack and memory, which contains, the remainder of the stack. Some embodiments utilize a variable buffer that is configured to buffer transfers between the processor registers and the memory. The actual amount of data stored in the variable buffer is configured to be flexible, so that transfers between the variable buffer and processor registers are managed to keep the processor registers filled with active stack data (assuming that stack data exists). However, transfers between the variable buffer and memory may be configured to occur only when the variable buffer exceeds certain fill capacities.


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