The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 25, 2008
Filed:
May. 31, 2006
Tholasampatti Subramanian Sudhindra Prasad, Dresden, DE;
Tholasampatti Subramanian Sudhindra Prasad, Dresden, DE;
Qimonda Flash GmbH & Co. KG, Dresden, DE;
Abstract
A charge-trapping memory device includes an array of non-volatile memory cells. The array has at least a first sector and a second sector. Each sector includes a multiplicity of memory cells. Each memory cell is adapted to trap an amount of charge indicative of a programming state. A control circuit is operationally connected to the array and is adapted to access a memory cell of the array by means of storing charge in or removing charge from the memory cell. A disturb detection circuit is operationally connected to the array or the control circuit and is adapted to detect a disturbance level of the first sector based on a disturbance caused by accessing at least one memory cell of the second sector. A disturb leveling circuit is operationally connected to the array and the disturb detection circuit and is adapted to backup the programming state of memory cells of the first sector if the detected disturbance level exceeds a predefined threshold.