High performance and scalable width expansion architecture for fully parallel cams

Abstract

A technique that provides highly scalable width expansion architecture for cascading CAMs to facilitate searching of increased wordlengths. In one example embodiment, this is achieved by combining a plurality of CAM devices in a serial cascade arrangement. Each CAM device of the serial cascade arrangement receives a portion of the search word. Each of the CAM devices in the serial cascade arrangement includes a CAM, a plurality of GMAT lines, a dummy match line, and a GMAT interface circuitry. The GMAT interface circuitry facilitates driving the match signals from a substantially previous CAM to a substantially adjacent CAM. The last CAM device is coupled to a match latch and a priority encoder. The first CAM device provides a single mismatch signal on an associated dummy match line for coordinating match signals associated with the plurality of GMAT lines of each of the plurality of CAM devices and to transfer the match signals from the last CAM device to the match latch circuit and the priority encoder and to output a combined search result.