The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 18, 2008
Filed:
Mar. 09, 2006
Applicant:
Akihito Matsumoto, Suwa, JP;
Inventor:
Akihito Matsumoto, Suwa, JP;
Assignee:
Seiko Epson Corporation, , JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
A semiconductor wafer includes a plurality of semiconductor chip regions including ferroelectric memory devices, a test chip region, and a wiring that connects each of the plurality of semiconductor chip regions with the test chip region.
Matsumoto, Akihito. (2008). Semiconductor wafer and method for testing ferroelectric memory device (U.S. Patent No. 7345935). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7345935
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile