The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 18, 2008
Filed:
Dec. 05, 2005
Applicants:
Abdellatif Bellaouar, Richardson, TX (US);
Ahmed R. Fridi, Richardson, TX (US);
Arul M. Balasubramaniyan, Plano, TX (US);
Inventors:
Abdellatif Bellaouar, Richardson, TX (US);
Ahmed R. Fridi, Richardson, TX (US);
Arul M. Balasubramaniyan, Plano, TX (US);
Assignee:
Sirific Wireless Corporation, Waterloo, Ontario, CA;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
A phase locked loop (PLL) with reduced loop filter components having dual charge pumps and corresponding dual signal paths that reduce on-chip component size within the filters. The dual paths are combined advantageously via dual varactors within a voltage controlled oscillator to further reduce loop filter components. The PLL removes the drawbacks of noise introduced by circuitry normally used for summing dual path configurations.