The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 11, 2008
Filed:
Jul. 07, 2004
Stefan Grosser, Schnaittenbach, DE;
Mario Maier, Ensdorf, DE;
Reinhard Mark, Hersbruck, DE;
Monika Singer, Greenville, SC (US);
Stefan Grosser, Schnaittenbach, DE;
Mario Maier, Ensdorf, DE;
Reinhard Mark, Hersbruck, DE;
Monika Singer, Greenville, SC (US);
Siemens Aktiengesellschaft, Munich, DE;
Abstract
An input circuit (') provided with a time delay element (), which circuit is capable of being tested by a controlled high level or low level connection, and a method for the operation thereof. The delay time of the time-delay element can be modified during operation of the input circuit. In particular, the elapsed delay time is read out prior to the testing of the input circuit and is restored again after testing, so that the test does not increase the effective input delay time for the process signals. In addition or as an alternative, the delay time is set to a minimum value prior to the test to enable rapid testing of the input circuit independent of the set delay time.