The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 11, 2008

Filed:

Mar. 21, 2006
Applicants:

Chun-ching Wei, Taipei, TW;

Yang-en Wu, Taipei, TW;

Wei-cheng Lin, Wurih Township, Taichung County, TW;

Inventors:

Chun-Ching Wei, Taipei, TW;

Yang-En Wu, Taipei, TW;

Wei-Cheng Lin, Wurih Township, Taichung County, TW;

Assignee:

Au Optronics Corp., Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01); H03K 19/096 (2006.01);
U.S. Cl.
CPC ...
Abstract

A shift register circuit having shift registers comprising a first transistor having a gate and a first source/drain for receiving an output signal of a pre-stage shift register, a second transistor having a gate coupled to a second source/drain of the first transistor, a first source/drain coupled to a first clock signal, and a second source/drain coupled to a output, a first pull-down module coupled to the output terminal, for receiving the first clock signal, wherein the output is coupled to a first voltage level when the output signal of pre-stage shift register and the first clock signal are at low voltage level, and a second pull-down module coupled to the output and a second clock signal, wherein the output is coupled to a first voltage level when the output signal of pre-stage shift register and the second clock signal are at low voltage level.


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