The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 11, 2008
Filed:
May. 31, 2005
Philip LI, Scottsdale, AZ (US);
Suman K. Banerjee, Chandler, AZ (US);
Thuy B. Dao, Austin, TX (US);
Olin L. Hartin, Chandler, AZ (US);
Jay P. John, Chandler, AZ (US);
Philip Li, Scottsdale, AZ (US);
Suman K. Banerjee, Chandler, AZ (US);
Thuy B. Dao, Austin, TX (US);
Olin L. Hartin, Chandler, AZ (US);
Jay P. John, Chandler, AZ (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
Methods are provided for forming a semiconductor device from a substrate comprising a bottom gate layer, a channel layer overlying the bottom gate layer, and a top gate structure formed over the channel layer. First, a hardmask comprising a first material interposed between a second material and a third material is deposited over a portion of the top gate structure. Then, the hardmask and top gate structure are encapsulated with an insulating material to form a spacer. A channel structure is formed from the channel layer, and the channel structure is disposed under the spacer. A bottom gate structure is formed from the bottom gate layer, and the bottom gate structure is disposed under the channel structure. Then, a source/drain contact is formed around the bottom gate structure.