In-circuit device, system and method to parallelize design and verification of application-specific integrated circuits ('asics') having embedded specialized function circuits

Abstract

An in-circuit design and verification device, system and method are disclosed for cooperatively designing and verifying application-specific integrated circuit device prior to fabrication by emulating logical and specialized functions. By emulating specialized circuits of the ASIC, an in-circuit design and verification-device can advantageously detect errors that are not generally detectable by conventional techniques for verifying ASIC designs. In one embodiment, an in-circuit design and verification system includes programmable logic configured to emulate on-chip logic of an ASIC as well as a specialized function circuit configured to emulate a specialized function that the programmable logic cannot emulate. The in-circuit design and verification system also includes an emulation interface configured to exchange signals between the configured programmable logic and the specialized function circuit during in-circuit design and verification. The configured programmable logic and the specialized function circuit thus cooperate to emulate the ASIC.