The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 04, 2008
Filed:
Dec. 11, 2003
Rabin Sugumar, Sunnyvale, CA (US);
Sorin Iacobovici, San Jose, CA (US);
Chandra M. R. Thimmannagari, Fremont, CA (US);
Rabin Sugumar, Sunnyvale, CA (US);
Sorin Iacobovici, San Jose, CA (US);
Chandra M. R. Thimmannagari, Fremont, CA (US);
Sun Microsystems, Inc., Santa Clara, CA (US);
Abstract
The present application describes a method and a processor for handling register dependency conflicts between lesser and greater width instructions, colloquially referred to as 'evil twins.' If there is a register dependency between a greater width producer instruction and a lesser width consumer instruction, a greater width source register is substituted for the source register specified by the lesser width producer. If there is a register dependency between a lesser width producer instruction and a greater width producer instruction, the greater width consumer instruction is replaced by multiple helper instructions. One or more of the helper instructions merge lesser width registers aliased onto the source registers specified by the greater width consumer instruction, into temporary registers. Another helper instruction executes the greater width consumer instruction using the temporary registers instead of the original source registers.