The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 04, 2008

Filed:

Dec. 14, 2005
Applicant:

Andrew J. Walker, Mountain View, CA (US);

Inventor:

Andrew J. Walker, Mountain View, CA (US);

Assignee:

Schiltron Corporation, Mountain View, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01); G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory circuit and a method is provided for programming a dual-gate memory cell without program disturb in other dual-gate memory cells in the memory circuit coupled by common word lines. In one embodiment, the method uses a self-boosting technique on unselected memory cells having source and drain regions in the shared semiconductor layer between their memory devices and their access devices brought to a predetermined voltage close to the threshold voltage of their access devices, thereby rendering the source and drain regions substantially floating. In some embodiments, the source and drain regions are brought to the predetermined voltage via one or more select gates and intervening access gates. In some embodiments, the select gates are overdriven.


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