The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 04, 2008
Filed:
Dec. 03, 2004
Ho Sung Choo, Daegu, KR;
Seung Hyun Ra, Kyungki-do, KR;
Yong Suk Kim, Kyungki-do, KR;
Jung Woo Lee, Kyungki-do, KR;
Hyo Soon Shin, Kyungki-do, KR;
Hyoung Ho Kim, Kyungki-do, KR;
Ho Sung Choo, Daegu, KR;
Seung Hyun Ra, Kyungki-do, KR;
Yong Suk Kim, Kyungki-do, KR;
Jung Woo Lee, Kyungki-do, KR;
Hyo Soon Shin, Kyungki-do, KR;
Hyoung Ho Kim, Kyungki-do, KR;
Samsung Electro-Mechanics Co., Ltd., Kyungki-Do, KR;
Abstract
A method for manufacturing a multilayer ceramic capacitor, in which internal electrodes printed on each of a plurality of dielectric sheets have reduced thicknesses using an absorption member, thereby allowing the multilayer ceramic capacitor to have a high capacity and be minimized. The method includes printing the internal electrodes on each of the dielectric sheets, and stacking the dielectric sheets, wherein the internal electrodes formed on each of the dielectric sheets have a reduced thickness by causing an absorptive member to contact the surface of each of the dielectric sheets provided with the internal electrodes and then separating the absorptive member from the surface so that portions of the internal electrodes having a designated thickness are eliminated, and the dielectric sheets provided with the internal electrodes having the reduced thickness are stacked to form a chip element.