The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 26, 2008
Filed:
Dec. 24, 2003
Ramyanshu Datta, Austin, TX (US);
Robert Kevin Montoye, Austin, TX (US);
Ramyanshu Datta, Austin, TX (US);
Robert Kevin Montoye, Austin, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A low-power shift-and-negate unit within a fused multiply-adder circuit is disclosed. The shift-and-negate unit includes a large shift stage, a coarse shift stage, a negate stage and a fine shift stage. The large shift stage receives a first set of shift signals and a group of data signals to generate a group of first intermediate signals. The coarse shift stage receives a second set of shift signals and the group of first intermediate signals to generate a group of second intermediate signals and their complement signals. The large shift stage and the coarse shift stage are executed within a first single processor cycle. The negate stage receives a complement decision signal and the group of second intermediate signals along with their complement signals to generate a group of third intermediate signals. Finally, the fine shift stage receives a third set of shift signals and the group of third intermediate signals to generate a group of output signals. The negate stage and the fine shift stage are executed within a second single processor cycle.