Shift register that suppresses operation failure due to transistor threshold variations, and liquid crystal driving circuit including the shift register

Abstract

A shift register having a plurality of stages connected in cascade shifts an output signal by a plurality of clocks having different phases. Each of the stage includes an input diode to which a signal is input from a preceding stage, a capacitor for holding charge having a voltage level of the input signal, a first transistor that is turned on or off by the held voltage level to output an output signal to a following stage in synchronization with a clock signal, and a second transistor connected between the input diode and an output terminal. A control electrode of the second transistor is connected to the input diode in the following stage. The second transistor has a clamping function for discharging the accumulated charge and turning off the first transistor when the clock signal is phase-shifted.