The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 26, 2008

Filed:

Apr. 05, 2006
Applicants:

Behzad Razavi, Los Angeles, CA (US);

Zaw Min Soe, Encinitas, CA (US);

Inventors:

Behzad Razavi, Los Angeles, CA (US);

Zaw Min Soe, Encinitas, CA (US);

Assignee:

Wionics Research, Irvine, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

The inventive technique can dynamically adjust the current being applied within the components of a prescaler or divider. This dynamic scaling of the current can improve the speed of the divider by a factor of two or reduce the average current in half when compared to the conventional prescaler. Inverters are used to directly adjust the dynamic value of the currents. The removal of the conventional NMOS device within the conventional circuit eliminates one gate delay in the CML prescaler. Second, the inventive prescaler circuits operate under a current injection/extraction technique. A group of small matched inverters can be used to drive each current switching circuit independently within the entire prescaler as compared to a large buffer driving the entire conventional prescaler. Finally, dynamic current scaling offers the designer additional flexibility in the design trade off between the maximum current applied to the load and achieving the maximum performance.


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