The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 26, 2008

Filed:

Jun. 27, 2005
Applicant:

Arkadiy Morgenshtein, Kiryat-Motzkin, IL;

Inventor:

Arkadiy Morgenshtein, Kiryat-Motzkin, IL;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 19/20 (2006.01); H03K 19/094 (2006.01);
U.S. Cl.
CPC ...
Abstract

A logic circuit consists of a first transistor network and a complementary second transistor network connected at a central node. The central node serves as a first logic output. Each of the transistor networks is also connected to a respective root. A third transistor network is connected between an intermediate node of one of the transistor networks and the network's respective root. For a homogeneous graft, the third transistor network has a complementary structure to the transistors between the intermediate node and the central node, is of the same transistor type as the given transistor network, and has inverted inputs relative to the transistors between the intermediate node and the central node. The third transistor network (the graft network) provides a second logic output to the logic circuit.


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