The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 26, 2008

Filed:

Dec. 12, 2005
Applicants:

Guo-feng Uei, Hsinchu, TW;

Ming-sheng Lai, Taipei, TW;

Inventors:

Guo-Feng Uei, Hsinchu, TW;

Ming-Sheng Lai, Taipei, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A test circuit for a flat panel display device is provided. The test circuit includes a substrate, a plurality of pixel structures, a plurality of signal lines and a plurality of shorting bar sets. The substrate includes at least one scan side, at least one data side and a pixel area. Each pixel structure formed in the pixel area having n sub-pixels, where n is a positive integer. The signal lines are formed on the substrate, and each signal line is connected to a corresponding sub-pixel. Each shorting bar set is formed on at least one of the at least one scan side and the at least one data side, wherein the shorting bar sets are electrically connected to the signal lines.


Find Patent Forward Citations

Uei, Guo-Feng. (2008). Test circuit for flat panel display device (U.S. Patent No. 7336093). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7336093

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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