The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 26, 2008

Filed:

Nov. 15, 2006
Applicants:

Richard Lee Donze, Rochester, MN (US);

Karl Robert Erickson, Rochester, MN (US);

William Paul Hovis, Rochester, MN (US);

John Edward Sheets, Ii, Zumbrota, MN (US);

Jon Robert Tetzloff, Rochester, MN (US);

Inventors:

Richard Lee Donze, Rochester, MN (US);

Karl Robert Erickson, Rochester, MN (US);

William Paul Hovis, Rochester, MN (US);

John Edward Sheets, II, Zumbrota, MN (US);

Jon Robert Tetzloff, Rochester, MN (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/26 (2006.01); H01L 23/58 (2006.01); H01L 21/66 (2006.01);
U.S. Cl.
CPC ...
Abstract

An apparatus and method are disclosed for measuring bias of polysilicon shapes relative to a silicon area wherein the presence of an electrical coupling is used to determine the presence of bias. Bridging vertices on the polysilicon shapes are formed. Bridging vertices over the silicon area create low resistance connections between those bridging vertices and the silicon area; other bridging vertices over ROX (recessed oxide) areas do not create low resistance connections between those other bridging vertices and the silicon area. Determining which bridging vertices have low resistance connections to the silicon area and how many bridging vertices have low resistance connections to the silicon area are used to determine the bias of the polysilicon shapes relative to the silicon area.


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