The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 26, 2008
Filed:
Mar. 21, 2005
Greg D. U'ren, Corona del Mar, CA (US);
Greg D. U'Ren, Corona del Mar, CA (US);
Newport Fab, LLC, Newport Beach, CA (US);
Abstract
According to an exemplary embodiment, a method for integrating bipolar and CMOS devices on a substrate, where the substrate includes bipolar and CMOS regions and has a sacrificial oxide layer situated thereon, includes removing a portion of the sacrificial oxide layer in the bipolar region of the substrate to expose a top surface of the substrate. The method includes forming a base layer on the top surface of the substrate in the bipolar region. The base layer forms a bipolar transistor base. The method further includes forming a sacrificial post on the base layer in the bipolar region and at least one gate electrode in the CMOS region of the substrate. A common mask is used to form the sacrificial post and the at least one gate electrode. The method further includes forming LDD regions adjacent to the at least one gate electrode in the CMOS region.