The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 19, 2008

Filed:

Jul. 02, 2004
Applicants:

Jagesh Sanghavi, Cupertino, CA (US);

Eliot Gerstner, Mountain View, CA (US);

Inventors:

Jagesh Sanghavi, Cupertino, CA (US);

Eliot Gerstner, Mountain View, CA (US);

Assignee:

Tensilica, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

An apparatus, method, and computer-readable media that provide fast and accurate prediction of the hardware cost of logic to extend a processor. Aspects of the invention enable designers to explore instruction set alternatives at the architectural level without completing a lengthy implementation flow. Embodiments may use existing standard cell libraries and EDA tools to obtain the cost of parameterized building blocks, to build components of a microprocessor such as instruction decoder, register files, and data path execution units. The cost of an application specific microprocessor is derived from the cost of each of its structural components.


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