The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 19, 2008

Filed:

Sep. 11, 2003
Applicants:

Hideto Nakamura, Yamanashi-ken, JP;

Mitsunori Taguchi, Yamanashi-ken, JP;

Tsutomu Tokunaga, Yamanashi-ken, JP;

Shigeru Iwaoka, Yamanashi-ken, JP;

Nobuhiko Saegusa, Yamanashi-ken, JP;

Inventors:

Hideto Nakamura, Yamanashi-ken, JP;

Mitsunori Taguchi, Yamanashi-ken, JP;

Tsutomu Tokunaga, Yamanashi-ken, JP;

Shigeru Iwaoka, Yamanashi-ken, JP;

Nobuhiko Saegusa, Yamanashi-ken, JP;

Assignees:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for driving a display panel with which the dark contrast can be improved is provided. Each of at least two successive sub-fields including a leading sub-field includes a selective write addressing step for setting the discharge cells to a lighted discharge cell mode by selectively causing a writing discharge in the discharge cells in accordance with the video signal. The sub-fields following at least two sub-fields include a selective erasure addressing step for setting the discharge cells to an unlighted discharge cell mode by selectively causing an erasing discharge in the discharge cells in accordance with the video signal and an emission sustain step for repeatedly causing a sustain discharge corresponding to a weighting of that sub-field only in the discharge cells that are in the lighted discharge cell mode. The last sub-field of each field includes a first erasing step for inducing a first erasing discharge between the column electrode and one of the row electrodes of the row electrode pair belonging to the discharge cells that have been set to the unlighted discharge cell mode in the selective erasure addressing step and a second erasing step for inducing a second erasing discharge between the row electrodes of the row electrode pair belonging to the discharge cells that have been set to the lighted discharge cell mode in the selective write addressing step, the first erasing step and the second erasing step being performed immediately after the emission sustain step.


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