The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 19, 2008
Filed:
Jan. 24, 2005
Markus Muellauer, Friesach, AT;
Markus Muellauer, Friesach, AT;
Infineon Technologies AG, Munich, DE;
Abstract
A circuit arrangement for monitoring an external voltage supply (VBAT, VBAT) and for reliable locking of a signal (Z), which is emitted from a logic circuit (), at a voltage level (VDD, VSS) of an internal voltage supply, wherein the circuit arrangement has a voltage divider (), which is connected between a first and a second external supply voltage (VBAT, VBAT) and produces a potential level (VLOCK) for a switching signal; a controllable switch () which separates the internal voltage supply, which has a first and a second internal supply voltage (VDD, VSS), from the logic circuit () in order to deactivate the latter as a function of a locking signal (LOCKP) which is produced from the switching signal; and a high-value resistor () by means of which the signal (Z) which is emitted from the deactivated logic circuit () is drawn to the level of one of the two internal supply voltages (VSS).