Manufacture of trench-gate semiconductor devices

Abstract

A method of manufacturing a trench-gate semiconductor device (), the method including forming trenches () in a semiconductor body () in an active transistor cell area of the device, the trenches () each having a trench bottom and trench sidewalls, and providing silicon oxide gate insulation () in the trenches such that the gate insulation () at the trench bottoms is thicker than the gate insulation () at the trench sidewalls in order to reduce the gate-drain capacitance of the device. The method includes, after forming the trenches (), the steps of: (a) forming a silicon oxide layer () at the trench bottoms and trench sidewalls; (b) depositing a layer of doped polysilicon () adjacent the trench bottoms and trench side walls; (c) forming silicon nitride spacers () on the doped polysilicon () adjacent the trench sidewalls leaving the doped polysilicon exposed at the trench bottoms; (d) thermally oxidising the exposed doped polysilicon to grow said thicker gate insulation () at the trench bottoms; (e) removing the silicon nitride spacers (); and (f) depositing gate conductive material () within the trenches to form a gate electrode for the device. The final thickness of the thicker gate insulation () at the trench bottoms is well controlled by the thickness of the layer of doped polysilicon () deposited in step (b). Also the doped (preferably greater than 5 e 19 cm-3) polysilicon oxidises fast at low temperatures (preferably 700-800° C.), reducing the risk of diffusing (e.g. p body) implantations present in the device at that stage.