The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7332252 B1

PDF
Full Text
Expired
Date of Patent:
Feb. 19, 2008

Filed:

Dec. 29, 2006
Applicants:

Chun Soo Kang, Seoul, KR;

Byoung Sub Nam, Cheongju-si, KR;

Inventors:

Chun Soo Kang, Seoul, KR;

Byoung Sub Nam, Cheongju-si, KR;

Assignee:

Hynix Semiconductor Inc., Icheon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G03F 9/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A mask layout forming method includes designing an original layout in which a diagonal pattern of a first polygon is repeatedly arranged in a diagonal direction relative to a vertical-axis direction. Opposite edge sides of the diagonal pattern of the first polygon are corrected such that second polygons extending in a horizontal-axis direction are stacked at the opposite edge sides of the diagonal pattern of the first polygon to form a stair-shaped layout. The polygons are fractured in the horizontal-axis direction to provide data associated with the corrected layout to an electron beam exposure system. The diagonal pattern of the first polygon defines an active region and a device isolation layer along a 6Fcell layout or a 4Fcell layout.


Find Patent Forward Citations

Kang, Chun. (2008). Method of forming a mask layout and layout formed by the same (U.S. Patent No. 7332252). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7332252

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