The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 19, 2008

Filed:

Oct. 06, 2004
Applicants:

Seiji Ichiyanagi, Aichi, JP;

Jun Otsuka, Aichi, JP;

Manabu Sato, Aichi, JP;

Inventors:

Seiji Ichiyanagi, Aichi, JP;

Jun Otsuka, Aichi, JP;

Manabu Sato, Aichi, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
C03C 27/00 (2006.01); B32B 5/14 (2006.01);
U.S. Cl.
CPC ...
Abstract

A ceramic substrate for a thin film electronic component, a production method thereof, and a thin film electronic component using the ceramic substrate A first substrate () includes a dense glass-ceramic mixed layer () containing glass in its surface portion. A second substrate is prepared such that a glass layer () formed on a surface of a substrate base portion () is subjected to a heat-pressure treatment so as to form or rather partly change the glass portion () into a dense glass-ceramic mixed layer () in which glass is dispersed into a surface portion of the substrate base portion (). A surface of the dense glass-ceramic mixed layer () is then subjected to grinding or rather polishing to flatten and expose a surface of the dense glass-ceramic mixed layer (). A third substrate includes a substrate base portion () having a dense glass-ceramic mixed layer () containing glass on a surface portion in one face side, and a wiring pattern () formed inside the substrate base portion (). In the wiring pattern (), one end thereof is exposed on or from a surface of the dense glass-ceramic mixed layer () and the other end is exposed on or from another surface of the substrate.


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