The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 05, 2008

Filed:

Apr. 20, 2005
Applicants:

Rajat Chauhan, Uttaranchal, IN;

Sunil C. Kasanyal, Uttaranchal, IN;

Inventors:

Rajat Chauhan, Uttaranchal, IN;

Sunil C. Kasanyal, Uttaranchal, IN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/094 (2006.01); H03K 19/0175 (2006.01);
U.S. Cl.
CPC ...
Abstract

A voltage translator circuit for low level to high level voltage translation includes a plurality of transistors coupled to an inverter for receiving a common input signal at an input node of the plurality of transistors and passing a translated output signal to the output node of the plurality of transistors. A latch circuit is connected between a first node at the output node of the plurality of transistors and a second node that is connected to a feedback element at an input side of the plurality of transistors to form a feedback circuit that minimizes static power dissipation.


Find Patent Forward Citations

Chauhan, Rajat. (2008). Voltage translator having minimized power dissipation (U.S. Patent No. 7327163). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7327163

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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