The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 05, 2008
Filed:
Jun. 05, 2006
Jerimy Nelson, Fort Collins, CO (US);
Mark D. Frank, Longmont, CO (US);
Peter Shaw Moldauer, Wellington, CO (US);
Gary Taylor, Windsor, CO (US);
David Quint, Fort Collins, CO (US);
Jerimy Nelson, Fort Collins, CO (US);
Mark D. Frank, Longmont, CO (US);
Peter Shaw Moldauer, Wellington, CO (US);
Gary Taylor, Windsor, CO (US);
David Quint, Fort Collins, CO (US);
Hewlett-Packard Development Company, L.P., Houston, TX (US);
Abstract
A multilayer substrate having a bonding surface is disclosed. One embodiment of the substrate may comprise a bypass capacitor connection pad disposed on the bonding surface. The bypass capacitor connection pad may have a bypass capacitor power pad and a bypass capacitor ground pad. The substrate may also comprise a plurality of power vias routed from the bypass capacitor power pad to a first redistribution layer spaced apart from the bonding surface and a plurality of ground vias routed from the bypass capacitor ground pad to the first redistribution layer. The substrate may further comprise a plurality of power and ground vias routed from the first redistribution layer to a second redistribution layer according to a power and ground via pattern array, wherein the plurality of ground vias are jogged at the first redistribution layer to the plurality of power vias to form the power and ground via pattern array.