The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 29, 2008
Filed:
Dec. 03, 2004
Raguram Damodaran, Plano, TX (US);
Timothy D. Anderson, Dallas, TX (US);
Sanjive Agarwala, Richardson, TX (US);
Joel J. Graber, Richardson, TX (US);
Raguram Damodaran, Plano, TX (US);
Timothy D. Anderson, Dallas, TX (US);
Sanjive Agarwala, Richardson, TX (US);
Joel J. Graber, Richardson, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
The pBIST solution to memory testing is a balanced hardware-software oriented solution. pBIST hardware provides access to all memories and other such logic (e.g. register files) in pipelined logic allowing back-to-back accesses. The approach then gives the user access to this logic through CPU-like logic in which the programmer can code any algorithm to target any memory testing technique required. Because hardware inside the chip is used at-speed, the full device speed capabilities are available. CPU-like hardware can be programmed and algorithms can be developed and executed after tape-out and while testing on devices in chip form is in process.