The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 29, 2008
Filed:
Sep. 14, 2004
Jon D. Trantham, Chanhassen, MN (US);
Gina R. Danner, Inver Grove Heights, MN (US);
Mark A. Heath, Moore, OK (US);
Jon D. Trantham, Chanhassen, MN (US);
Gina R. Danner, Inver Grove Heights, MN (US);
Mark A. Heath, Moore, OK (US);
Seagate Technology LLC, Scotts Valley, CA (US);
Abstract
An embedded system with reduced susceptibility to single event upset effects. The system includes an instruction memory that can store at least one instruction set. The instruction memory utilizes a parity checking error-detection scheme. The system also includes a non-volatile memory that can store a copy of the at least one instruction set, and a data memory that can store at least one data sequence. The data memory utilizes an error correction coding (ECC) scheme. A controller, which is responsive to the instruction memory, the non-volatile memory, and the data memory, replaces the at least one instruction set in the instruction memory with the copy of the at least one instruction set from the non-volatile memory, if a parity error is detected in connection with the at least one instruction set in the instruction memory. The controller also operates in conjunction with the data memory to implement the ECC scheme.