The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 29, 2008

Filed:

Jul. 26, 2001
Applicants:

Kazuyoshi Irisawa, Tokyo, JP;

Tetsuo Shinriki, Tokyo, JP;

Naoto Shibata, Tokyo, JP;

Inventors:

Kazuyoshi Irisawa, Tokyo, JP;

Tetsuo Shinriki, Tokyo, JP;

Naoto Shibata, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 9/00 (2006.01); G06F 12/14 (2006.01);
U.S. Cl.
CPC ...
Abstract

Switching between a requiring mode and a non-requiring mode of password code checking is enabled by an IC card with a CPU for accessing an EEPROM. The general data in the EEPROM are stored upon attachment of error check codes. The memory area of EEPROM is partitioned into unit areas of 2-byte length and writing is performed according to unit areas. The MSB of a specific unit area Ux is used as a checking requirement flag with '1' being defined as checking 'required' and “0” being defined as checking “not required”. In rewriting the checking requirement flag, an erasure process sets all bits in the unit area Ux to “1” and thereafter the desired flag is set in the MSB.


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