The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 29, 2008

Filed:

Mar. 24, 2004
Applicant:

David Thomas, Wellington, CO (US);

Inventor:

David Thomas, Wellington, CO (US);

Assignee:

LSI Logic Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/00 (2006.01); G06F 5/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A hardware-controlled data protection scheme can be used on a device providing buffering between two different protocols, especially where at least one of the protocols does not use fixed length blocks. A fixed block size is arbitrarily imposed on the data in order to calculate a cyclical redundancy code (CRC) for the block. Block sizes are restricted to a value of 2, e.g., 2, 4, 8, 16, etc. The device is able to time-share and to receive or send data on more than one port while sharing the CRC engine between the ports. Intermediate values of the CRC for a given port are temporarily saved in a CRC register file. As a block of data for a given port is completed, a final CRC value for the block is saved to a CRC random access memory (RAM) located on the device and the entry in the register file is cleared. When the data is then output from the device, the CRC for the block is recalculated and checked against the saved value to be sure that they match.


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