The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 29, 2008

Filed:

May. 28, 2004
Applicants:

Richard Miller, Los Altos, CA (US);

Gabriel-gheorghe Dumitrescu, San Jose, CA (US);

Ion E. Opris, San Jose, CA (US);

Inventors:

Richard Miller, Los Altos, CA (US);

Gabriel-Gheorghe Dumitrescu, San Jose, CA (US);

Ion E. Opris, San Jose, CA (US);

Assignee:

Silicon Clocks Inc., Oakland, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04J 3/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

A circuit for generating an output oscillation signal with low jitter includes an oscillator to generate an oscillation signal at an initial frequency based upon a control input to vary an amplitude of the oscillation signal. A first frequency multiplier multiplies the oscillation signal to result in a first signal with first frequency and first undesired frequency components. A filter minimizes the first undesired frequency components of the first signal. A second frequency multiplier multiplies the first signal to result in the output oscillation signal with second frequency and second undesired frequency components. A second feedback circuit compares a predetermined range and at least one of the first signal and the output oscillation signal to result in a reference value. A first feedback circuit varies the control input based upon a comparison between the reference value and the amplitude of the oscillation signal to minimize the second undesired frequency components.


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