The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 29, 2008
Filed:
Mar. 03, 2006
Sanjay K. Charagulla, San Jose, CA (US);
Chiakang Sung, Milpitas, CA (US);
Joseph Huang, San Jose, CA (US);
Bonnie I. Wang, Cupertino, CA (US);
Yan Chong, San Jose, CA (US);
Sanjay K. Charagulla, San Jose, CA (US);
Chiakang Sung, Milpitas, CA (US);
Joseph Huang, San Jose, CA (US);
Bonnie I. Wang, Cupertino, CA (US);
Yan Chong, San Jose, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
Circuits, methods, and apparatus for filtering signals at a high-speed data interface. One exemplary embodiment is particularly configured to filter a clock signal at the end of a data burst received by a double-data rate memory interface. A clock input port is either connected or disconnected to an input cell. When a data burst is to be received, the clock input port is connected to the input cell. When the data burst concludes, the clock input port is disconnected from the input cell. In a specific embodiment, a signal is received indicating that a data burst is about to begin and the clock input port is connected to the input cell. The signal later changes state indicating that the last data bit is being received. When the last clock edge corresponding to the last data bit is received, the clock input port is disconnected from the input cell.