The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 29, 2008
Filed:
Apr. 02, 2007
Albert Bergemont, Palo Alto, CA (US);
Venkatraman Prabhakar, Pleasanton, CA (US);
Keyhan Sinai, Santa Clara, CA (US);
Albert Bergemont, Palo Alto, CA (US);
Venkatraman Prabhakar, Pleasanton, CA (US);
Keyhan Sinai, Santa Clara, CA (US);
Maxim Integrated Products, Inc., Sunnyvale, CA (US);
Abstract
Low power high density random access memory flash cells and arrays using Fowler Nordheim (FN) tunneling for both programming and erasing. The memory array is divided into sectors, each sector comprising a predetermined number of rows. The bit lines are similarly segmented, each global bit line being selectively connectable to a local bit line for each sector, each local bit line being connected to the drains of all floating gate cells in a respective column of each sector. The sources of all floating gate cells in a respective column of each sector are connected to a local source line for that sector, the local source lines for each sector being controllably connectable to respective global source lines. Consequently all floating gate cells within a column of a sector are connected in parallel, source to source and drain to drain. Representative programming and erase voltages not disturbing other cells are disclosed.