The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 29, 2008
Filed:
Sep. 30, 2004
Sukhbir Singh Dulay, San Jose, CA (US);
Justin Jia-jen Hwu, San Jose, CA (US);
Thao John Pham, San Jose, CA (US);
Sukhbir Singh Dulay, San Jose, CA (US);
Justin Jia-Jen Hwu, San Jose, CA (US);
Thao John Pham, San Jose, CA (US);
Hitachi Global Storage Technologies Netherlands B.V., Amsterdam, NL;
Abstract
A method of making and using thin film calibration features is described. To fabricate a calibration standard according to the invention raised features are first formed from an electrically conductive material with a selected atomic number. A conformal thin film layer is deposited over the exposed sidewalls of the raised features. The sidewall material is selected to have a different atomic number and is preferably an nonconductive such as silicon dioxide or alumina. After the nonconductive material deposition, a controlled directional RIE process is used to remove the insulator layer deposited on the top and bottom surface of the lines and trenches. The remaining voids between the sidewalls of the raised features are filled with a conductive material. The wafer is then planarized with chemical mechanical planarization (CMP) to expose the nonconductive sidewall material on the surface. The nonconductive sidewall material will be fine lines embedded in conductive material.