The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 15, 2008

Filed:

Aug. 08, 2006
Applicant:

Prasanth Ambady, Providence, RI (US);

Inventor:

Prasanth Ambady, Providence, RI (US);

Assignee:

Sensata Technologies, Inc., Attleboro, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01R 13/62 (2006.01);
U.S. Cl.
CPC ...
Abstract

A sliderthat integrates adaptor alignment and anti-stick features is shown for use in a socket for mounting BGA type IC devices for burn-in tests. Sliderhas a top wall surfaceformed with a plurality of apertures in a grid array defined by intersecting ribs. A plurality of wall extension portionsare formed extending upwardly from portions of x-direction ribs that serve as fine alignment features with an IC deviceadapted to be placed on the flat top end surface of the wall extension portions between rows of IC device solder ball terminals. Anti-stick fingersextend in the x-direction from wall extension portionsalong a y-direction rib defining the outer limit of the first columnof apertures of the main grid. A concave surfaceis formed in each finger facing wall portionsand the height of wall portionsis limited to a location below the position of solder balls of an IC device mounted in the socket to provide clearance for a mechanical support ball positioned in the first column of apertures next to wall extension portionoutside the main grid field to provide full grid array capability.


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