The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 08, 2008

Filed:

Oct. 11, 2002
Applicants:

Harish Devanagondi, Saratoga, CA (US);

Nicholas Bambos, San Matoo, CA (US);

Harish Belur, Saratoga, CA (US);

Richard Heaton, San Jose, CA (US);

Majid Torabi, Los Altos Hills, CA (US);

Inventors:

Harish Devanagondi, Saratoga, CA (US);

Nicholas Bambos, San Matoo, CA (US);

Harish Belur, Saratoga, CA (US);

Richard Heaton, San Jose, CA (US);

Majid Torabi, Los Altos Hills, CA (US);

Assignee:

Greenfield Networks, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 12/28 (2006.01); H04L 12/54 (2006.01);
U.S. Cl.
CPC ...
Abstract

A parallel packet processing queueing architecture and method are described. A packet is divided up into cells. A first or start processor queue is selected for the first cell. The following cells of the packet are then placed in the queues in a predetermined order. An example of a predetermined order is placing the cells in consecutive processor queues modulo (the number of processor queues) after the start processor. Such a predetermined order is illustrated in the context of a per Cell Contiguous Queueing (CCQ) architecture. The architecture provides benefits of alleviating the pre-processing and post-processing buffering burdens and decreasing the amount of information required for reassembly of the packet.


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