The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 08, 2008
Filed:
Oct. 02, 2001
Applicants:
Kenji Oi, Kasugai, JP;
Takashi Shimizu, Kasugai, JP;
Hirotaka Ueno, Kasugai, JP;
Hiroshi Takase, Kasugai, JP;
Inventors:
Kenji Oi, Kasugai, JP;
Takashi Shimizu, Kasugai, JP;
Hirotaka Ueno, Kasugai, JP;
Hiroshi Takase, Kasugai, JP;
Assignee:
Fujitsu Limited, Kawasaki, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/08 (2006.01); G06F 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
An interface circuit that can disconnect a loop connection among nodes. The interface circuit includes ports, which are connected to bus cables, a state machine and a port controller, which is connected to the ports and the state machine. The state machine determines that a loop connection exists when a process in a predetermined state has been stacked for a predetermined time. When a loop connection exists, the port controller electrically disconnects a port on the loop.