The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 08, 2008
Filed:
Jul. 15, 2005
Nicola Telecco, San Jose, CA (US);
Vijay P. Adusumilli, San Jose, CA (US);
Anil Gupta, Saratoga, CA (US);
Edward Hui, Cupertino, CA (US);
Steven J. Schumann, Sunnyvale, CA (US);
Nicola Telecco, San Jose, CA (US);
Vijay P. Adusumilli, San Jose, CA (US);
Anil Gupta, Saratoga, CA (US);
Edward Hui, Cupertino, CA (US);
Steven J. Schumann, Sunnyvale, CA (US);
Atmel Corporation, San Jose, CA (US);
Abstract
A nonvolatile memory apparatus includes a separate controller circuit and memory circuit. The controller circuit is fabricated on a first integrated circuit chip. The controller circuit includes a plurality of charge pump circuits, a system interface logic circuit, a memory control logic circuit, and one or more analog circuits. The memory circuit is fabricated on a second integrated circuit chip and includes a column decoder, a row decoder, a control register, and a data register. A memory-controller interface area includes a first plurality of die bond pads on the first integrated circuit chip and a second plurality of die bond pads on the second integrated circuit chip such that the first and second integrated circuit chips may be die-bonded together. A single controller circuit may interface with a plurality of memory circuits, thus further reducing overall costs as each memory circuit does not require a dedicated controller circuit.