The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 08, 2008
Filed:
Feb. 08, 2006
Jeremy Scuteri, Highland, NY (US);
Gregory A. Blum, Lagrangeville, NY (US);
Jeremy Scuteri, Highland, NY (US);
Gregory A. Blum, Lagrangeville, NY (US);
Seiko Epson Corporation, Tokyo, JP;
Abstract
Circuits and methods for detecting the lock status of a phase locked loop (PLL). The circuit generally comprises (a) a controller configured to produce a control signal in response to a reference clock signal, (b) a counter configured to count pulses of an output signal of the PLL (or a periodic derivative of the output signal) in response to the control signal, and (c) a decoder configured to (i) receive a counter output in response to the control signal, and (ii) produce a lock status output based on the counter output. The method generally comprises the steps of (1) counting pulses of a PLL (or a periodic derivative thereof) in response to a reference clock signal, and (2) indicating a lock status based on the number of counted pulses. The present invention advantageously provides a circuit designer the ability to tune the range of acceptable frequencies by choosing an appropriate reference frequency and adjusting the decoder to produce a positive lock status for a desired range of pulse counts.