The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 08, 2008

Filed:

Aug. 26, 2005
Applicants:

Hitoshi Yamaguchi, Nisshin, JP;

Tomoatsu Makino, Okazaki, JP;

Yoshiyuki Hattori, Aichi-gun, JP;

Kyoko Okada, Nagoya, JP;

Inventors:

Hitoshi Yamaguchi, Nisshin, JP;

Tomoatsu Makino, Okazaki, JP;

Yoshiyuki Hattori, Aichi-gun, JP;

Kyoko Okada, Nagoya, JP;

Assignee:

DENSO CORPORATION, Kariya, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/74 (2006.01); H01L 29/417 (2006.01); H01L 31/111 (2006.01); H01L 29/36 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device includes: a center region; a periphery region; and a semiconductor layer including pairs of a first region having a first impurity amount and a second region having a second impurity amount. The first and the second regions are alternately aligned in a plane. The periphery region includes an utmost outer and an utmost inner periphery pairs. The utmost outer periphery pair has a difference between the second and the first impurity amounts, which is smaller than a maximum difference in the periphery region. The utmost inner periphery pair has a difference between the second and the first impurity amounts, which is larger than a difference in the center region.


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