The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 01, 2008
Filed:
May. 20, 2004
Abdul Mj Muthalif, Bangalore, IN;
Raghavendra N Rao, Bangalore, IN;
Javaji Sunil Babu, Bangalore, IN;
Abdul MJ Muthalif, Bangalore, IN;
Raghavendra N Rao, Bangalore, IN;
Javaji Sunil Babu, Bangalore, IN;
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A technique to enable accurate timing and functional verification in a negative constraint calculation (NCC) implemented event-driven logic simulators when there are negative constraints in logic elements. In one example embodiment, the technique adjusts negative timing constraints by grouping the timing constraints based on associated output terminals in a digital logic circuit. The NCC is then applied to each grouped constraint to correct for path delays and resulting timing inaccuracy during an event driven simulation.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile