The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 25, 2007
Filed:
Jun. 29, 2004
John A. Nerl, Londonderry, NH (US);
Ken Pomaranski, Roseville, CA (US);
Gary Gostin, Plano, TX (US);
Andrew Walton, Rocklin, CA (US);
David Soper, Murphy, TX (US);
John A. Nerl, Londonderry, NH (US);
Ken Pomaranski, Roseville, CA (US);
Gary Gostin, Plano, TX (US);
Andrew Walton, Rocklin, CA (US);
David Soper, Murphy, TX (US);
Hewlett-Packard Development Company, L.P., Houston, TX (US);
Abstract
A system utilizing an erasure mode in an error correction code algorithm is described that includes non-volatile memory storing a page deallocation table. A memory controller stores and retrieves data from a memory subsystem, and uses an error correction code algorithm to correct data corruption in retrieved data. An error analysis algorithm executed in a processor records instances of data corruption in the page deallocation tables and deallocates memory regions associated with multiple occurrences of data corruption at single bit locations. The error analysis algorithm further causes the memory controller to apply an erasure mode of the error correction code algorithm upon detection of a repeated pattern of data corruption across different addresses of the memory subsystem, and removes entries in the page deallocation table that correspond to data corruption addressed by application of the erasure mode.