The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 25, 2007
Filed:
Aug. 25, 2006
Shengming Huang, Gourock, GB;
Shengming Huang, Gourock, GB;
National Semiconductor Corporation, Santa Clara, CA (US);
Abstract
A low drop out (LDO) regulator that includes a novel error amplifier, which is arranged with a first stage that employs both NMOS and PMOS devices that are similarly doped in differential pairs and a second stage that operates with NMOS and PMOS devices in a push-pull arrangement. In addition to the error amplifier, the LDO regulator can also include a startup circuit coupled to an enable voltage, a reference filter circuit coupled to a reference voltage, an output circuit, a quiescent current control circuit, and a pulse generator circuit. Also, an internal RC network is provided to compensate for phase shift. The integrated operation of the components of the regulator enables stable and fast operation of an LDO regulator with no external capacitors connected to the input or output terminals.