The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 25, 2007
Filed:
Oct. 01, 2004
Kaiyuan Chen, Dallas, TX (US);
Joe Trogolo, Plano, TX (US);
Tathagata Chatterjee, Allen, TX (US);
Steve Merchant, Bedford, NH (US);
Kaiyuan Chen, Dallas, TX (US);
Joe Trogolo, Plano, TX (US);
Tathagata Chatterjee, Allen, TX (US);
Steve Merchant, Bedford, NH (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
The present invention provides a high-voltage junction field effect transistor (JFET), a method of manufacture and an integrated circuit including the same. One embodiment of the high-voltage junction field effect transistor (JFET) () includes a well region () of a first conductive type located within a substrate () and a gate region () of a second conductive type located within the well region (), the gate region () having a length and a width. This embodiment further includes a source region () and a drain region () of the first conductive type located within the substrate () in a spaced apart relation to the gate region () and a doped region () of the second conductive type located in the gate region () and extending along the width of the gate region (). In place of or addition to the doped region (), the high-voltage junction field effect transistor (JFET) () may includes a conductive field plate () located over and extending along the width of the gate region ().