Phase locked loop circuit having deadlock protection circuit and methods of operating same

Abstract

A phase locked loop (PLL) circuit having a deadlock protection circuit and a deadlock protection method of the PLL circuit are provided. The PLL circuit includes: a phase frequency detector, which receives an input clock signal and a divided clock signal and compares the phase and frequency of the input clock signal with the phase and frequency of the divided clock signal; a charge pump, which receives an output signal of the phase frequency detector; a voltage-controlled oscillator, which oscillates in response to an output voltage of the charge pump; a main divider, which divides the frequency of an first output clock signal of the voltage-controlled oscillator and outputs the divided clock signal as the division result; and a deadlock protection circuit, which is electrically coupled to an output port of the voltage-controlled oscillator and an input port of the main divider, and divides the frequency of the first output clock signal of the voltage-controlled oscillator and then provides the division result to the main divider if the frequency of the first output clock signal of the voltage-controlled oscillator is above a threshold frequency.