Dual function clock signal suitable for host control of synchronous and asynchronous target devices

Abstract

A host device in a data communication system provides a dual-function clock/enable signal at a single output port shared by at least one asynchronous target device and at least one synchronous target device. In the asynchronous operating mode, the host device generates an asynchronous gated-clock signal that facilitates read/write functions of one or more selected asynchronous target devices. In the synchronous operating mode, the host device generates a synchronous clock-gate signal that facilitates read/write functions of one or more selected synchronous target devices. The target devices and the host device share both a common data bus and a common clock bus. The host device supplies the dual-function clock/enable signal on the common clock bus.