The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 11, 2007
Filed:
Nov. 21, 2002
Mitsumi Itoh, Kyoto, JP;
Masatoshi Sawada, Shiga, JP;
Junko Honma, Kyoto, JP;
Kenji Shimazaki, Hyogo, JP;
Hiroyuki Tsujikawa, Shiga, JP;
Hiroshi Benno, Osaka, JP;
Mitsumi Itoh, Kyoto, JP;
Masatoshi Sawada, Shiga, JP;
Junko Honma, Kyoto, JP;
Kenji Shimazaki, Hyogo, JP;
Hiroyuki Tsujikawa, Shiga, JP;
Hiroshi Benno, Osaka, JP;
Matsushita Electric Industrial Co., Ltd., Osaka, JP;
Abstract
It is an object of the invention to effectively absorb a power noise and to implement the stable operation of a circuit. The invention provides a semiconductor device comprising a bypass capacitor including an MOS structure having a gate electrode formed to be extended from a power wiring region to a portion provided under an empty region which is adjacent to the power wiring region and has no other functional layer, and formed through a capacitive insulating film on a diffusion region having one conductivity type, and a substrate contact formed under a ground wiring region and fixing a substrate potential, wherein the bypass capacitor has a contact to come in contact with the power wiring which is formed on a surface of the gate electrode and has the diffusion region having the one conductivity type and a diffusion region of the substrate contact connected to each other.