The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 11, 2007
Filed:
Dec. 30, 2003
Rafael Reif, Newton, MA (US);
Kuan-neng Chen, Cambridge, MA (US);
Chuan Seng Tan, Cambridge, MA (US);
Andy Fan, Cambridge, MA (US);
Rafael Reif, Newton, MA (US);
Kuan-Neng Chen, Cambridge, MA (US);
Chuan Seng Tan, Cambridge, MA (US);
Andy Fan, Cambridge, MA (US);
Massachusetts Institute of Technology, Cambridge, MA (US);
Abstract
A method of forming a multi-layer semiconductor structure includes attaching a handle-member to a top surface of a first structure using a first interface. At least one region of a bottom surface of the first structure is etched to form at least a first via-hole for exposing a portion of a first conductive member defined on the first structure. A conductive material is disposed in the first via-hole such that a first end of the conductive material is in electrical communication with the first conductive member and a second end of the conductive material is exposed at the bottom surface of the first structure. A second interface is disposed over at least the second end of the conductive material, which serves as a bonding and/or electrical interface between the first conductive member defined on the first structure and a second structure of the multi-layer semiconductor device structure.